Hardware efficient watermarking technique for finite state sequential circuit using STG
نویسندگان
چکیده
Intellectual Property Protection (IPP) is very important for a design created by IP owner. For this, IP owner embeds watermark in its design. One such type of technique is suggested by Oliviera, in which modification of State Transition Graph (STG) of a digital circuit takes place in such a way that it is not possible for the intruder to find that there is a watermark embedded in the circuit. It is also possible to prove the piracy of the design in court-of-law. A method for state reduction in the watermarked circuit has been proposed in this paper. The comparison of simulation of non-watermarked, watermarked circuit with existing technique and the modified reduced state watermarked circuit is done using ModelSim Simulator. The Detection of Piracy can be done by using a counter circuit.
منابع مشابه
Techniques for the creation of digital watermarks in sequentialcircuit designs
We present a methodology for the watermarking of synchronous sequential circuits that makes it possible to identify the authorship of designs by imposing a digital watermark on the state transition graph (STG) of the circuit. The methodology is applicable to sequential designs that are made available as firm intellectual property, the designation commonly used to characterize designs specified ...
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